Version Specific Information for HC(S)08

The ROM, Z_RAM and RAM ranges depend on the target CPU. It is recommended to increase the stack size if some standard libraries are used.

For the detailed information on debugging HC08 application using MON8 interface please follow to the chapter MON8 on HC08.

Beans' implementation details:

• All the beans:
  • Interrupt priority - the value of this property is ignored, since the HC08 has no HW support for setting interrupt priorities.
  • Event priority - the value of this property can be only "0" (interrupts disabled) or "1" (interrupts enabled), since the HC08 has no HW support for setting interrupt priorities.
• CPU:
  • Speed Mode selection (CPU methods SetHighSpeed, SetLowSpeed, SetSlowSpeed): if CPU clock-dependent beans are used then signals generated from such internal peripherals may be corrupted at the moment of the speed mode selection (if function of clocked devices is enabled). Handling of such a situation may be done via events BeforeNewSpeed and AfterNewSpeed.
  • Interrupt vector table in ROM is placed at the default address in the ROM or in the Flash.
    If the interrupt vector table in RAM is selected then it is generated the table in RAM and special redirection code to ROM. This code transfers program control to the selected address according the table in RAM. You can use CPU methods SetIntVect to set the address of interrupt service routine.
    Note: you cannot change the interrupt vector that is allocated by any bean in your project. It is recommended to select the event OnSWI together with this option to minimize size of generated code.
• PPG: The PPG beans always allocates the whole timer. Although it would be possible to share the selected timer between 2 PPG beans, it would be impossible to set the PPG period for these two beans separately. (More information about this bean can be found in chapter Timers)
• PWM: In contrast to the PPG beans, it is possible for PWM beans to share the selected timer, since they do not have the SetPeriod method. (More information about this bean can be found in chapter Timers)
• EventCntr16: Since the timer overflow flag is set when the timer reaches a value of 65535, the maximum number of events that can be counted by this bean is limited to 65534 (value of 65535 is marked as invalid as the method GetNumEvents returns the ERR_OVERFLOW value as its result.) (More information about this bean can be found in chapter Timers)
• TimeDate: It is recommended to make a setting close to 10 ms (resolution provided by GetTime/SetTime methods). Smaller values unnecessarily overload the system.
• WatchDog: When the Watchdog bean is added to the project, it is automatically enabled. The enabling code is placed in the CPU initialization code.
  Note: Watchdog is enabled by a write to the configuration register. This register can be written only once after CPU reset. Since the register also contains other bits, that are written during the CPU initialization, the watchdog must be enabled when CPU is initialized. The property "CPU clock/speed selection" has no effect because the COP timer clock source is CGMXCLK.
• AsynchroSerial:
  • Timing setting 'values from list' enables to select various values denoted by changes of the prescaler most tightly coupled with the UART.
  • If a software handshake is used for extremely high baud-rates it may happen that no overruns appear and transmitted characters get lost
• AsynchroMaster: the same as AsynchroSerial
• AsynchroSlave: the same as AsynchroMaster.
• SynchroMaster: Because of the disability of an SPI device (configured as Master) caused by a mode fault, the mode fault automatically disables the bean (inside interrupt service) if interrupt service is enabled. If the interrupt service disabled and a mode fault occurs, the bean will be disabled at the beginning of RecvChar method.
• SynchroSlave: A mode fault doesn't disable an SPI device (configured as Slave), therefore it doesn't disable the bean.
  If a mode fault error occurs, software can abort the SPI transmission by disabling and enabling of the device ('Enable' and 'Disable' methods). When Clock edge property = "falling edge", Shift clock idle polarity property = "Low" or Clock edge property = "rising edge", Shift clock idle polarity property = "High" the SS pin of the slave SPI module must be set to logic 1 between bytes. The falling edge of SS indicates the beginning of the transmission. This causes the SPI to leave its idle state and begin driving the MISO pin with the MSB of its data. Once the transmission begins, no new data is allowed into the shift register from the data register. Therefore, the slave data register must be loaded with the desired transmit data before the falling edge of SS.
• BitIO, BitsIO, ByteIO, Byte2IO, Byte3IO, Byte4IO:
  The GetVal and GetDir methods are always implemented as macros. Optimization for property (BitIO, BitsIO) doesn't influence the generated code.
• WordIO, LongIO:
  These beans could not be implemented on Freescale HC08 - this CPU has no instructions for 16-bit and 32-bit access into the I/O space.
• ADC, ADconverter:
  There are the following restrictions in Processor Expert:
  • Clock input of A/D clock generator cannot be changed in runtime.
  • The voltage levels supplied from internal reference node cannot be measured.
  A conversion time in the 'Conversion time' dialog is calculated for the worse case, that is 17 cycles per one conversion.
• ADfast:
  There are the following restrictions in Processor Expert:
  • Clock input of A/D clock generator cannot be changed in runtime.
  • The voltage levels supplied from internal reference node cannot be measured.
  • ADC device doesn't support continuous mode through adjoining channels. Therefore the bean does measurement in single mode.
  A conversion time in the 'Conversion time' dialog is calculated for the worse case, that is 17 cycles per one conversion.
• ExtInt:
  If a pin other than IRQ (IRQ1) is set in this bean, setting of the 'Pull resistor' property affects only disable state of the device (bean). If the device (bean) is enabled, the pull-up resistor is always connected to the pin.
• KBI:
  
  • Setting of the 'Pull resistor' property affects only the disabled state of the device (bean). If device (bean) is enabled, the pull-up resistors are always connected to the used pins.
  • Only one bean can be used in PE project.
• IntEEPROM:
  A bean expects that all security options of EEPROM are disabled. If some security option is enabled methods performing write operation (such as SetByte) can return an error.

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