Processor Expert Priority System

Some CPUs support selectable interrupts priorities. The user may select a priority for each interrupt vector. The interrupt with a higher priority number can interrupt a service routine with the lower one.

Processor Expert supports the following settings in design-time: interrupt priority and priority of the event code.
Priority can be changed also in the user code. The user may use Cpu method to adjust the requested value.

Small microcontroller architectures support only a basic interrupt control: interrupts enabled or disabled. Settings of the interrupt priority may be ignored for such microcontrollers. The only option is to enable interrupts for the user event code.

Interrupt Priority

The user may select interrupt priority in the bean properties, just below the interrupt vector name. Processor Expert offers the following values, which are supported for all microcontrollers:

• minimum priority
• low priority
• medium priority
• high priority
• maximum priority

The selected value is automatically mapped to the priority supported by the target microcontroller. It is indicated in the third column of the Bean Inspector.
The user may select a target-specific value (such as priority 255), if portability of the application to another architecture is not required.

Priority of Event Code

The user can also select a priority for the processing of his/her event code. This priority may be different from the interrupt priority. However, the meaning of the number is the same - the event may be interrupted only by the interrupts with the higher priority. Processor Expert offers the following architecture independent values:

• same as interrupt - default value which means that Processor Expert doesn't generate any code influencing the priority of the event - the priority is in the state determined by the default hardware behavior.
• minimum priority
• low priority
• medium priority
• high priority
• maximum priority
• interrupts disabled - e.g. the highest priority supported by the microcontroller, which may be interrupted only by non-maskable interrupts.

The selected value is automatically mapped to the priority supported by the target microcontroller and the selected value is displayed in the third column of the Bean Inspector.
Please see version specific information below. The user may also select a target-specific value, if portability of the application to another architecture is not required.

Version Specific Information for HCS12X derivatives

Processor Expert offers the following event priority options:

• Interrupts Enabled - interrupts are enabled and the interrupts with the higher priority than the current interrupt priority can interrupt the event code. (The state of the register CCRH is not changed.)
• Interrupts Disabled - all maskable interrupts are disabled. (The state of the register CCRH is not changed.)
• 0 - The same as Interrupts Disabled
• 1..7 - Priorities from lowest (1) to highest (7). The code generated by Processor Expert before the event invocation sets the event code priority to the specified value (by writing to the CCRH register) and enables interrupts.
• Same as interrupt - default behavior of the architecture - no interrupts can interrupt the event. The same as Interrupts Disabled.
• Other values are mapped to the priorities 1..7.

Version specific information for HCS12 derivatives

Processor Expert offers the following event priority options:

• Interrupts Disabled - all maskable interrupts are disabled.
• Interrupts Enabled - all maskable interrupts are enabled.
• Same as interrupt - default behavior of the architecture - no interrupts can interrupt the event. The same as Interrupts Disabled.

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