• Bean name - Name of the bean.
• Channel - The channel used for serial asynchronous communication.
• Interrupt service/event - The bean may or may not be implemented using interrupts.
  • Interrupt - Interrupt from serial channel (for information only). It can be either shared interrupt for receiver and transmitter or another interrupt related to the selected serial channel. It is empty if the serial channel does not support such interrupt.
  • Interrupt RxD - Interrupt from serial receiver.
  • Interrupt RxD priority - The priority of the interrupt associated with the asynchronous communication.
  • Interrupt TxD - Interrupt from serial transmitter.
  • Interrupt TxD priority - Priority of the interrupt associated with the asynchronous communication.
  • Settings supported for Freescale HCS12, HCS12X and 56800 derivatives only.
    • Interrupt Error - Error interrupt from serial receiver.
    • Interrupt Error priority - Priority of the interrupt associated with the asynchronous communication.
  • Input buffer size - Input buffer size in bytes. DMA mode: If DMA controller is available on the selected CPU and the receiver is configured to use DMA controller then this property is disabled (read-only). Input buffer has to be allocated by user and it is specified in the RecvBlock method.
  • Output buffer size - Output buffer size in bytes. DMA mode: If DMA controller is available on the selected CPU and the transmitter is configured to use DMA controller then this property is disabled (read-only). Output buffer has to be allocated by user and it is specified in the SendBlock method.
  • Handshake - Communication handshake. The handshake can be supported by HW (special pins) or implemented by SW (any pins). SW handshake can be safely used only when the system is not heavily loaded. If SW handshake is used and the system is overloaded then overrun errors may occur.
    • CTS - Clear to send handshake. To use this feature the Transmitter must be enabled. DMA mode: If DMA controller is available on the selected CPU and the transmitter is configured to use DMA controller then this property is disabled. CTS can't be used in this mode.
      • HW support required - User may select this when the CPU has a special pin reserved for the CTS signal. This pin will service the CTS.
      • CTS Pin - Clear-to-send pin.
      • CTS pin signal - Signal name of CTS pin.
      • Interrupt CTS - Interrupt from the CTS.
      • Interrupt CTS priority - Priority of the interrupt associated with the asynchronous communication.
    • RTS - Ready to send handshake. To use this feature the Receiver must be enabled. DMA mode: If DMA controller is available on the selected CPU and the receiver is configured to use DMA controller then this property is disabled. RTS can't be used in this mode.
      • HW support required - User may select this when the CPU has a special pin reserved for the RTS signal. This pin will service the RTS.
      • RTS Pin - Ready-to-send pin
      • RTS pin signal - Signal name of RTS pin
      • RTS enabled - If an input buffer is enabled and a SW handshake is used then the given number denotes a number of received characters in the buffer when the signal RTS is activated. If a SW handshake is used then the maximum efficiency can be achieved by using the input buffer of a greater size than the specified number for RTS enabled. This item is not accessible if the input buffer is disabled.
• Settings - Common bean setting.
  • Parity - The type of the parity bit (none, hardware odd, hardware even, even (hw or sw), odd (hw or sw)). If odd [even] is selected and the number of “ones” (bits) in the transmitted byte is odd, then the parity bit is 0 [1]. If none is selected, there is no parity bit. The parity bit can be implemented by hardware (if it is supported by the device) or by software.
  • Width - Number of information bits.
  • Stop bit - Number of stop bits (signaling the end of data transmission).
  • Settings supported for Freescale HCS08, HCS12, HCS12X and 56800 derivatives only.
    • SCI output mode - Selects the output mode of the SCI device. If the Loop mode is selected the output pin TxD is internally connect to RxD pin.
      There are 3 modes:
      • Normal - Normal transmission using TxD and RxD pins There are no items in this mode.
      • Loop - TxD and RxD pins are internally connected. There are no items in this mode.
      • Single-wire - Transmission using one bidirectional pin. The following items are displayed in this mode:
        • HCS08/HCS12/HCS12X - Setting supported for Freescale HCS08, HCS12 and HCS12X derivatives only.
          • Transmitter pin direction - Direction of the transmitter pin when the single-wire mode is selected.
            
            There are 2 options:
            
            • input: TxD pin is an input in single-wire mode
            • output: TxD pin is an output in single-wire mode
            
            
  • Receiver - Enable/Disable the receiver.
    • RxD - Input pin used for the communication.
    • RxD pin signal - Signal name of RxD pin.
  • Transmitter - Enable/Disable the transmitter.
    • TxD - Output pin used for the communication.
    • TxD pin signal - Signal name of TxD pin.
  • Baud rate - Communication baud rate. It is necessary to enter both a value and an unit (see Timing Setting Syntax). The setting may be made with the help of the Timing dialog box that opens when clicking on (...)button.
  • Break signal - Enables/disables a communication break - special state used to cause a communication reset.
  • Setting supported for Freescale HC08, HCS12X and 56800 family and MC9S08AW60, MC9S08QG8, MC9S08QG4, MC9S08LC60, MC9S12E256, MC9S12E32 and MC9S12UF32 derivatives only.
    • Transmitter output - Reverses the polarity of transmitted data.
  • Setting supported for Freescale HCS12X and HCS12 MC9S12E256, MC9S12E32 and MC9S12UF32 derivatives only.
    • Receiver input - Reverses the polarity of received data.
  • Setting for Freescale HCS12 and HCS12X derivatives.
    • Wakeup condition - Selects the condition of wake up the SCI.
      
      There are 2 options:
      
      • Address mark wakeup: a 1 in MSB position of received character wakes the receiver.
      • Idle line wakeup: An idle character on RxD pin wakes the receiver.
      
      
  • Setting supported for Freescale HCS12, HCS12X, HCS08 and 56800 derivatives only.
    • Stop in wait mode - Determines if the bean is stopped in wait mode.
  • Settings supported for Freescale HC08, HCS08, HCS12 and HCS12X derivatives only.
    • Settings not supported for SLIC module on Freescale HC08 QL3/4 derivatives.
      • Idle line mode - Idle line mode determines when the counter of idle character starts (after a start bit or stop bit).
        
        There are 2 options:
        
        • starts after start bit: Idle character bit count starts after start bit
        • starts after stop bit: Idle character bit count starts after stop bit
        
        
  • Setting for Freescale HCS12, HCS12X, HC08 EY16A, GR16, GR16A, GR32A, GR60A, GT16, GZ16, GZ32, GZ60, QB8, QC16 and HCS08 AW60, QG8, QG4, LC60 derivatives.
    • Break generation length - The length of the generated break character. The length (10 or 11, 13 or 14) depends on the setting of the data width.
  • Settings for Freescale HC08, HCS12 and HCS12X derivatives with Infrared SCI (LJ12/LK24/AP64/E256/E128/E64/E32/NE64/UF32).
    • Infrared SCI output - Infrared SCI output enable/disable.
      • SCI transmits - Infrared narrow pulse selection
  • Settings supported for Freescale HCS12X derivatives only.
    • Active edge detection - Enables receive input active edge detection.
      This property is enabled only when both the Receiver property and the Interrupt service/event property are enabled.
    • Bit error detection - Enables the bit error detection circuit.
      In interrupt mode the OnError event is called when a bit error is detected. Use the GetError method to get the error flag indicating cause of the error.
      This property is enabled only when both the Receiver property and the Transmitter property are enabled.
      
      There are 3 options:
      
      • Disabled: Bit error detect circuit is disabled
      • During the 9th time tick: Receive input sampling occurs during the 9th time tick of a transmitted bit
      • During the 13th time tick: Receive input sampling occurs during the 13th time tick of a transmitted bit
      
      
• Initialization - Initial settings (after power-on or reset).
  • Enabled in init. code - The bean is enabled after power-on or reset (in initialization code).
  • Events enabled in init. - Events enabled in initialization.
• CPU clock/speed selection - Settings for the CPU speed modes: specifies whether the bean is supported or not.
  For details about speed modes please refer to page Speed Modes Support.
  • High speed mode - The bean is enabled/disabled in the high speed mode.
  • Low speed mode - The bean is enabled/disabled in the low speed mode.
  • Slow speed mode - The bean is enabled/disabled in the slow speed mode.