Version Specific Information for HCS12

All beans were tested with the CodeWarrior with the following compiler settings:

  • Other parameters = -Onf

The ROM, ZPAGE and RAM ranges depend on the target CPU. It is recommended to increase the stack size if some standard libraries are used.

Beans' implementation details :

 

  • All the beans:
    • Interrupt priority - the value of this property is ignored, since the HCS12 has no hardware support for setting interrupt priorities.
    • Event priority - the value of this property can be only "0" (interrupts disabled) or "1" (interrupts enabled), since the HCS12 has no HW support for setting interrupt priorities.
  • CPU:
    • Speed Mode selection (CPU methods SetHighSpeed, SetLowSpeed, SetSlowSpeed): if CPU clock-dependent beans are used then signals generated from such an internal peripheral may be corrupted at the moment of the speed mode selection (if function of clocked devices is enabled). Handling of such a situation may be done via events BeforeNewSpeed and AfterNewSpeed.
    • Interrupt vector table in ROM is placed at the default address in the ROM or in the Flash.
      If the interrupt vector table in RAM is selected then it generates the table in RAM and special redirection code to ROM. This code transfers program control to the selected address according the table in RAM. You can use CPU methods SetIntVect to set the address of interrupt service routine.Note: you cannot change interrupt vector that is allocated by any bean in your project. It is recommended to select the event OnSWI together with this option to minimize the size of generated code.
  • PPG: HW doesn't support an interrupt. Aligned Center Mode Counter counts from 0 up to the value period register and then back down to 0. If the align mode is switched to Center align mode then real lengths of Period and Starting pulse width signals will be twice as much as is being displayed in the Bean Inspector. Note: See the Internal peripheral property group of the CPU bean for special settings.
  • PWM: HW doesn't support an interrupt. Aligned Center mode Counter counts from 0 up to the value period register and then back down to 0. If align mode is switched to Center align mode then the real lengths of Period and Starting pulse width signals will be twice as much as is being displayed in the Bean Inspector. Note: See the Internal peripheral property group of the CPU bean for special settings.
  • EventCntr8/16/32: Functionality of this bean is a subset of the pulse accumulator. For work with hold registers, gated time mode use the PulseAccumulator bean instead of the EventCounter bean.
  • PulseAccumulator:
    • Method Latch
      This method causes capture of the counter in the hold registers of all capture and pulse accumulator beans in PE project because this method is invoked for all ECT modules.
    Note: See Internal peripheral property group of the CPU bean for special settings.
  • Capture:
    • Method Reset -If the counter can't be reset (is not allowed by HW or the counter is shared by more beans) this method stores the current value of the counter into a variable instead of a reset.
    • Method GetValue -If the counter can't be reset (is not allowed by HW or the counter is shared by more beans) this method doesn't return the value of register directly, but returns the value as a difference between the register value and the previously stored register value. This causes values that are proportional to time elapsed from the last invocation of the method Reset.
    • Method Latch -This method causes capture of the counter in the hold registers of all capture and pulse accumulator beans in PE project because this method is invoked for all ECT modules.
    • Method GetHoldValue -This method transfers the contents of the associated pulse accumulator to its hold register.
    Note: See the Internal peripheral property group of the CPU bean for special settings.
  • BitIO, BitsIO, ByteIO, Byte2IO, Byte3IO, Byte4IO:
    The GetVal and GetDir methods are always implemented as macros.
  • LongIO:
    This bean could not be implemented on Freescale HCS12 - this CPU has no instructions for 32-bit access into the I/O space.
  • IntEEPROM:
    The EEPROM array is organized as rows of word (2 bytes), the EEPROM block's erase sector size is 2 rows (2 words). Therefore it is preferable to use word aligned data for writing - methods SetWord and SetLong - with word aligned address or to use virtual page - property 'Page'. The size has to be a multiple of 4 bytes.
  • SynchroMaster:
    The mode fault causes disability of the bean (and SPI device) automatically (inside interrupt service) if interrupt service is enabled. If the interrupt service isdisabled and a mode fault occurs, the bean will be disabled at the beginning of RecvChar method.
  • IntFlash:
    The Virtual page - Allocated by the user feature and corresponding methods and events are not implemented.
  • ExtInt:
    If XIRQ is selected, the method 'Disable' can't be generated, because it isn't supported by hardware. For pins of H, J, and P ports it is not possible to switch pull resistor (pull up/pull down) and sensitive edge (rising edge/falling edge) arbitrarily. Because of hardware limitations, pull down with falling edge and pull up with rising edge settings aren't allowed.

 


 

 

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