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Bean
SWSPI
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Software synchronous serial communication
High Level Bean
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This bean implements an external SPI communication interface specially designed
for SPI compatible beans. The interface uses three general-purpose
I/O pins, first for the Input line, second for the Output line,
third for the Serial Clock line. It is supported only Master mode with MSB (most significant bit)
and LSB (least significant bit) first.
The bean was tested with Freescale MC68HC908AZ60 MCUs and its clock frequency was 18kHz with 7.3MHz Xtal.
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©1997-2004, UNIS, Ltd.
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