This bean implements the Pulse Width Modulator for motor control (PWMMC). The PWMMC can be configured as three complementary pairs, six independent PWM signals, or their combinations, such as one complementary and four independent. Both Edge-Aligned and Center-Aligned synchronous pulse width control, form zero to 100 percent modulation, are supported.

A 15-bit (12-bit for MC68HC08MRx) PWM counter is applied to all six channels. PWM resolution is one clock period for Edge-Aligned operation and two clock periods for Center-Aligned operation. The clock period is dependent on the IPBus frequency and a programmable prescaler.

When generating complementary PWM signals, the module features automatic dead-time insertion to PWMMC output pairs. Each PWMMC output can be controlled by PWMMC generator or software manually.

This bean belongs to the category: CPU Internal Peripherals-Timer