The bean enables support for OSEK OS and configuration of Cpu related OSEK attributes. The product of generation is part of OSEK configuration file (*.oil), which should be included into the user configuration file (see Typical Usage). Two system timers can be configured for OSEK: System timer and Second timer. Each timer can be configured as HWCOUNTER or SWCOUNTER (for Cpus with direct support - see below). If the timer is configured as SWCOUNTER, interrupt of corresponding timer hardware means one tick of the SWCOUNTER. For HWCOUNTER, the timer hardware interrupt occurs only when an alarm attached to the counter expires. Each timer can also be configured as USER SWCOUNTER. The mode can be used for Cpus not directly supported by OSEK (see below). In this case inherited TimerInt bean handles timer peripheral and the timer behaves as SWCOUNTER. All interrupts used by other beans or Cpu bean are by default declared as Category 1 without any additional attributes. If this default setting needs to be changed, the interrupt vector must be registered in OSEK_OS bean and desired ISR attributes can be changed.

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Version specific information for HCS12 derivatives
OSEK directly supports following Cpus (Cpu beans): MC9S12DP256

This bean belongs to the category: SW-Operating System