This bean encapsulates the internal I2C communication interface. The implementation of the interface is based on the Philips I2C-bus specification. Interface features:

MASTER mode

• Multi master communication
• The combined format of communication possible (see "Automatic stop condition" property)
• 7-bit slave addressing
• Acknowledge polling provided
• Holding of the SCL line low by slave device is recognized as 'bus busy'
• Lost of arbitration and no-ACK detected

SLAVE mode

• 7-bit slave addressing
• General call address detection provided

This bean belongs to the category: CPU Internal Peripherals-Communication