Byteflight
 
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  Bean Byteflight
 
Byteflight communication interface

Parameters of the bean.

Properties:
  • Bean name - Name of the bean.
  • Channel - Channel used for Byteflight communication.
  • Interrupt service/event - Interrupt properties.
  • Settings - Settings
    • Input data pin - Receiver input pin.
    • Input data pin signal - Receive signal name
    • Output data pin - Transmitter output pin.
    • Output data pin signal - Transmit signal name.
    • Correct sync pulse pin - If enabled, a 50 ns pulse is driven on this pin after a successful reception or transmission of a sync pulse.
      • Pin - Correct sync pulse reception/transmission pin.
      • Pin signal - Correct sync pulse reception/transmission pin signal name.
    • Correct message/sync reception pulse pin - If enabled, a 50 ns pulse is driven on this pin after a successful reception of a message or sync pulse.
      • Pin - Correct message/sync reception pulse pin.
      • Pin signal - Correct message/sync reception pulse pin signal name.
    • Illegal pulse error pin - If enabled, a 50 ns pulse is driven on this pin after a message format or illegal pulse error. Optionally
      • Pin - Illegal pulse error pin.
      • Pin signal - Illegal pulse error pin signal name.
      • Slot mismatch - In addition to the basic functionality (pulse is driven after message format or illegal pulse error), a 50 ns pulse is driven also after slot mismatch.
    • Slot mismatch pin - If enabled, a 50 ns pulse is driven on this pin after a slot mismatch.
    • Mode selection - Selects the node as bus master or as bus slave. The master generates the SYNC pulses, while slave verifies the SYNC pulses.

      There are 2 options:

      • Master: Master mode
      • Slave: Slave mode

    • Stop in wait mode - Byteflight module stops in wait mode.
    • Wait time 't_wx0_tx' - Value of wait time 't_wx0_tx' in [ns], which is constant part of wait time 't_wx' when last bus activity was transmitted. Permissible interval of the values is from 175 ns to 6550 ns with step of 25 ns.
    • Wait time 't_wx0_rx' - Value of wait time 't_wx0_rx' in [ns], which is constant part of wait time 't_wx' when last bus activity was received. Permissible interval of the values is from 175 ns to 6550 ns with step of 25 ns.
    • Wait time 't_wx0_delta' - Value of wait time 't_wx0_delta' in [ns], which is multiplier part of wait time 't_wx'. Permissible interval of the values is from 25 ns to 6400 ns with step of 25 ns.
  • Receive FIFO - If enabled, receive FIFO of size up to 16 buffers can be specified.
    • Size of FIFO - The number of buffers, starting from buffer 0, assigned to the receive FIFO can be selected. Values up to 16 are possible.
    • Buffer number for FIFO access - To access receive FIFO, specify this buffer number in ReadFrame method (for information only).
    • FIFO identifier acceptance code - Defines a user specific pattern of bits to which the incoming identifier is compared. This determines whether the message is accepted by the FIFO.
    • FIFO identifier acceptance mask - The identifier acceptance mask specifies which of corresponding bits in the FIFO identifier acceptance code are relevant for acceptance filtering. A cleared bit in the mask indicates that the corresponding bit in the FIFO identifier acceptance code must be the same as incoming identifier bit. If a bit in the mask is set, it indicates that the state of corresponding bit in the FIFO identifier acceptance code will not affect whether or not the message is accepted by the FIFO.
    • FIFO identifier rejection code - The FIFO identifier rejection code defines a user-specified pattern of bits to which the incoming identifier is compared.
    • FIFO identifier rejection mask - The FIFO identifier rejection mask specifies which of corresponding bits in the FIFO identifier rejection code are relevant for rejection filtering. A cleared bit in this mask indicates that the corresponding bit in the FIFO identifier rejection code must be the same as the incoming identifier bit, before a match will be detected. The message will be rejected by the FIFO if all such bits match. If a bit in the mask is set, it indicates that the state of the corresponding bit in the FIFO identifier rejection code will not affect whether or not the message is rejected by the FIFO.
  • Dedicated receive buffers - If enabled, dedicated receive buffers can be specified.
    • Buffers - Dedicated receive buffers.
      One item of the list looks like:
      Buffer0 - Dedicated Receive buffer settings.
      • Receive identifier init - Initial value of the received buffer identifier. The Byteflight transfers received message to the dedicated receive buffer with matching identifier (ID).
      • Buffer number - To access the buffer, specify the Buffer number in ReadFrame method (for information only).
  • Transmit buffers - If enabled, receive buffers can be specified.
  • Initialization - Initialization of the Byteflight module.
  • CPU clock/speed selection - Settings for the CPU speed modes: if the bean is supported or not
    For details about speed modes please refer to page Speed Modes Support.


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